A) Field of the Invention
The present invention relates to a thin film transistor substrate and its manufacture method, and more particularly to a thin film transistor substrate having n- and p-channel transistors and its manufacture method.
B) Description of the Related Art
Thin film transistors are used for driving pixels of a liquid crystal display. For example, by using a polysilicon thin film, pixel driving thin film transistors can be formed in a display area and peripheral circuit thin film transistors can be formed in an area other than the display area.
Pixel driving thin film transistors are required to have a small leak current and are made of n-channel MOS thin film transistors (TFT) having lightly doped drain (LDD) regions. Peripheral circuit thin film transistors are required to have a small power consumption and are preferably made of complimentary (C) MOSTFTs. For a stable operation, n-channel TFTs of CMOSTFTs are desired to have the LDD structure. If a high speed operation is desired, it is preferable that both p-channel and n-channel transistors of CMOSTFTs have the structure without LDD regions, because the LDD regions hinder the high speed operation.
As an amorphous silicon thin film formed on a glass substrate is polycrystallized by applying an excimer laser beam, the threshold voltage of the polysilicon thin film transistor shifts largely to the minus side. It is necessary to dope p-type impurities such as boron to set the threshold voltage to 0 V (for example, refer to Japanese Patent Laid-open Publication HEI-03-006865).
Even if the threshold voltage is adjusted to 0 V, it is difficult to lower leak current at a voltage 0 of both n- and p-channel transistors due to a small margin.
In order to adjust the threshold voltages of both n- and p-channel transistors to have desired values, it is necessary to perform different impurity doping processes for n- and p-channel transistors (for example, refer to Japanese Patent Laid-open Publications HEI-04-290467, HEI-11-135801, and 2001-092373). At least one mask is therefore required.
Two masks are required to form high impurity concentration source/drain regions. Two masks are required to pattern a silicon thin film and a gate electrode layer. Five masks at the minimum are therefore required to manufacture CMOS TFTs. It is desired to reduce the number of masks in order to manufacture liquid crystal displays with a high manufacture yield and at a low manufacture cost.